London, UK, February 16, 2026 -- Oxford Quantum Circuits (OQC), today released a new preprint on arXiv detailing the design, engineering and experimental validation of a wafer-scale packaging architecture capable of supporting more than 500 superconducting qubits on a single 3-inch die.

Packages capable of supporting large arrays of high-coherence superconducting qubits are vital for the realisation of fault-tolerant quantum computers and the necessary high-throughput metrology required to optimise fabrication and manufacturing processes. As the quantum industry advances toward error-corrected architectures that may require millions of physical qubits, scalable system integration is emerging as a defining engineering challenge.

The research addresses this directly, demonstrating that large-scale packaging can be achieved without introducing prohibitive microwave loss channels, parasitic cavity modes or thermal management constraints. The work represents a  step in OQC’s roadmap as they advance towards scalable, fault-tolerant quantum processors based on wafer-scale dies of qubits. The demonstrated 500+ qubit packaging architecture in this research provides a scalable blueprint for packaging and techniques to address related engineering challenges.

Engineering for Scale Without Sacrificing Performance

The reported architecture is a wafer-scale superconducting package designed to mitigate packaging-induced error channels including box modes, dielectric and conductor losses, seam losses and Purcell decay.

Key elements of the design include:

• A superconducting cavity structure incorporating a dense pillar array to push box modes above qubit and resonator frequency bands.
• Simulation-driven loss budgeting using energy participation ratio (EPR) methods to quantify dielectric, conductor and seam losses.
• Finite-element modelling of differential thermal contraction to ensure mechanical robustness during cooldown to millikelvin temperatures.
• Thermal load simulations demonstrating compatibility with commercial dilution refrigerator cooling power, even in fully wired configurations.

The package supports over 500 qubit–resonator pairs on a monolithic 3-inch wafer and incorporates multiplexed readout to enable high-throughput measurement without per-qubit control lines in the demonstrated configuration.

Importantly, experimental validation shows that scaling the package does not degrade qubit performance:

• Median T₁ ≈ 97 μs (105 qubits measured)
• Median T₂e ≈ 129 μs (104 qubits measured)
• Median readout error ≈ 2.5% (97.5% fidelity) across 54 qubits
• Median effective qubit temperature of 36 mK using passive reset only

Finite-element simulations indicate that packaging-induced loss limits remain well above measured coherence times, confirming that device performance is primarily material-limited rather than packaging-limited.

High-Throughput Characterisation as a Manufacturing Tool

Beyond integration, the research highlights the value of statistically significant datasets in understanding qubit variability.

By measuring O(100) qubits on a single monolithic wafer, OQC demonstrates the ability to extract not only median coherence metrics but also to study spatial trends and coherence distributions across the wafer.

Bootstrapped sampling analysis shows that while median coherence can be estimated from relatively small subsets, identifying minimum and maximum coherence values with high confidence requires large sample sizes. This finding underscores the importance of large-N studies for feedback on iterative R&D cycles.

The wafer-scale package therefore functions not only as a scalable integration platform, but also as a high-throughput metrology tool capable of accelerating iterative manufacturing development cycles.

System-Level Readiness for Scaled Architectures

The study also addresses practical deployment constraints. Thermal modelling of a fully connected configuration, including 504 attenuated drive lines, multiplexed readout lines and parametric amplifier pump lines, predicts a mixing chamber heat load of approximately 3 μW, well within the cooling power of commercial dilution refrigerators.

The demonstrated readout is T₁-limited, and the paper outlines established routes to further improve fidelity through stronger resonator coupling and parametric amplification, aligning the architecture with future fault-tolerant requirements.

Advancing Toward Large-Scale Quantum Processors

OQC concluded that wafer-scale packaging supporting >500 superconducting qubits can be realised while maintaining high coherence and measurement performance. The approach provides:

• A low-loss, large-area superconducting enclosure design
• Statistical insight into coherence distributions across large qubit ensembles
• Compatibility with commercially available cryogenic infrastructure
• A practical route toward scalable, tileable modules for fault-tolerant systems

By integrating electromagnetic design, materials modelling, cryogenic engineering and automated calibration workflows, the work represents a significant milestone in the transition from laboratory-scale demonstrations to manufacturable quantum processors.

OQC’s research demonstrates a strengthened pathway towards practical quantum advantage signifying the company’s commitment to rigorous engineering and forward-looking system architecture as the quantum computing industry advances toward fault-tolerant quantum computing.

This research reflects a coordinated effort across design, fabrication, cryogenics and experimental characterisation. OQC recognises the authors Oscar W. Kennedy, Waqas Ahmad, Robert Armstrong, Amir Awawdeh, Anirban Bose, Kevin G. Crawford, Sergey Danilin, William D. David, Hamid El Maazouz, Darren J. Hayton, George B. Long, Alexey Lyapin, Scott A. Manifold, Kowsar Shahbazi, Ryan Wesley, Evan Wong and Connor D. Shelly for delivering this important contribution to scalable superconducting quantum systems.