SWAP Operations Are Not Needed in Quantum Computers and Can Be Eliminated Without Overhead Using the ParityQC Architecture

Technology October 28, 2024

With the recent development in quantum hardware, it has become feasible to physically swap qubits during computation (known as “physical SWAPs”). These operations are believed to be crucial for the scalability of quantum computers. The ParityQC team’s new publication, “Runtime Reduction in Linear Quantum Charge-Coupled Devices using the Parity Flow Formalism” argues that this is not the case. The authors (Federico Domínguez, Michael Fellner, Berend Klaver, Stefan Rombouts, Christian Ertler, Wolfgang Lechner) show that the ParityQC Architecture enables the implementation of quantum algorithms without the need for SWAP operations.

Physical SWAPs have been considered as a solution to a main challenge in scaling up quantum computers: the connectivity of qubits. Unlike bits in classical computers, not every gate between every qubit is physically possible. This limitation is called the connectivity of the chip. For example, consider a chain of qubits, where each qubit is connected to its left and right neighbor, or a 2d quantum chip, where each qubit is connected to its next neighbors. In these cases, only gates between connected qubits can be realized. To still allow for all gates, quantum information is moved to neighboring position via SWAP or shuttling operations. The Parity Flow formalism, which the team previously introduced in a paper, can be used to eliminate physical SWAP gates in linear hardware architectures without increasing the number of two-qubit operations.

This is of particular significance for the execution time of quantum circuits in linear Quantum Charge-Coupled Devices (QCCDs), where SWAP gates are implemented by physically changing the position of the ions. Because SWAP gates are one of the most time-consuming operations in QCCDs, the Parity scheme considerably reduces the runtime of the quantum Fourier transform and the quantum approximate optimization algorithm on all-to-all spin models, compared to circuits generated with standard compilers, like the TKET and Qiskit compiler. While increasing the problem size and therefore the number of qubits typically demands longer runtimes, which are constrained by coherence time, the runtime reduction with the Parity formalism enables a significant increase in the number of qubits at a given coherence time. When using QCCD, shuttling operations are still required by default, as laser light may not be accessible in every part of the quantum chip.

With this method ParityQC contributes twofold to the community:

The method with the associated ParityQC Compiler allows for more efficient compilation of quantum algorithms on current hardware.

Algorithms that currently require shuttling-based quantum computers can run on any linear device with static qubits without overhead.