August 7, 2024 -- Researchers from Islamic Azad University have developed new parity-preserving reversible multipliers that reduce costs and enhance error detection in quantum circuits. This advancement contributes to the ongoing efforts to make quantum computing more efficient and fault-tolerant. The research has been published in Frontiers of Computer Science.

The team introduced six new parity-preserving reversible blocks (Z, F, A, T, S, and L), achieving an average quantum cost reduction of 25.04% for 4-bit unsigned multipliers and 18.59% for 5-bit signed multipliers. These blocks maintain input and output parity, aiding in error detection and correction.

Key improvements include:

• For 4-bit unsigned multipliers, there is a 25.04% reduction in quantum cost, a 51.03% reduction in gate count, a 20.89% reduction in garbage output, and a 21.17% reduction in constant input, enhancing efficiency and simplifying the design.
• For 5-bit signed multipliers, the advancements include an 18.59% reduction in quantum cost, a 27.65% reduction in gate count, and a 13.82% reduction in garbage output and constant input, improving efficiency and reducing unnecessary data.

Quantum computing faces challenges such as power dissipation and error rates. Dr. Mojtaba Noorallahzadeh and his team addressed these issues by focusing on reversible computing principles, making their designs more efficient and fault-tolerant.

By improving error detection and reducing costs, this research supports the development of more advanced and reliable quantum computing technologies.

This collaborative effort between Islamic Azad University, the German Research Center for Artificial Intelligence (DFKI), and the University of Bremen provides a new approach to quantum circuit design.