April 17, 2026 -- C12, a Paris-based quantum computing company developing processors based on carbon nanotube spin qubits, today unveiled its technology roadmap towards commercial fault-tolerant quantum computing. The roadmap charts four generations of quantum processors, spanning from Aïdôs in 2027 to Panopeia in 2033, with the goal of scaling from a company's first logical qubit operations to utility-scale quantum computers.

C12's approach is rooted in a conviction that reaching useful quantum computing is an engineering challenge as much as a physics one. Rather than focusing on increasing the number of qubits simplistically, C12 is addressing the architectural challenges that determine whether quantum computers can scale to useful levels. The company's focus spans error correction efficiency, scalable interconnects, reproducible manufacturing, and system designs built for real-world deployment.

"Our objective is not simply to build more qubits," said Pierre Desjardins, co-founder and CEO of C12. "The real challenge is building quantum computers that can scale reliably. Our architecture is designed from the outset for scalability, speed, and real-world viability."

Four generations, one goal

• Aïdôs (2027) will demonstrate the company's first logical quantum operations. The system will integrate 16 physical qubits to form a logical qubit while maintaining sub-microsecond physical gate speeds.
• Zélos (2030) introduces modular semiconductor integration. The processor will scale to 236 physical qubits and 8 logical qubits while reducing logical error rates to approximately 10⁻⁵. This generation introduces chiplet packaging, cryogenic electronics, all-digital control signals, an on-chip qubit bias array, and multiplexed readout designed to support scalable manufacturing.
• Styx (2032) extends the modular architecture by replicating the chiplet unit of Zélos many times. The processor is designed to reach 8,500 physical qubits and at least 128 logical qubits, with logical error rates of 10⁻⁶ and significantly improved power efficiency.
• Panopeia (2033) represents the transition to an integrated utility-scale quantum system, capable of supporting universal quantum computation. The architecture combines Styx modules to target more than 100,000 physical qubits and nearly 800 logical qubits, reducing logical error rates to around 10⁻⁷ while maintaining sub-watt power consumption per qubit within a single cryostat.

The systems are named after figures from Greek mythology, reflecting both the progression of the technology and the philosophical roots of science in ancient Greece. Aïdôs, the spirit of humility, reflects the fact this system targets only the first small step toward utility: a modest logical qubit. Zélos, the embodiment of ambition, represents the drive to scale the quantum system while maintaining fidelity and control. Styx, the goddess overseeing the mythological river separating worlds, symbolizes the boundary between the classical world and the world of potential quantum advantage as the hardware becomes resilient enough to support large-scale computation. Panopeia, a name that reflects the ability to see all possibilities, much like qubits, represents C12's vision of a useful fault-tolerant quantum processor operating at utility scale.

The technology behind the roadmap

Carbon nanotube spin qubits sit at the heart of C12's hardware platform, a solid-state approach that pairs the speed of semiconductor devices with strong noise isolation. Ultra-pure carbon-12 nanotubes provide a nearly ideal one-dimensional pathway for electrical signals, enabling fast electronic gate operations and uniform qubit control.

"The materials platform we use gives us an unusual combination of speed, connectivity, and stability," said Matthieu Desjardins, chairman, co-founder, and CTO of C12. "That allows us to design systems where quantum error correction and large-scale integration are efficient at scale."

Built for the real world

A quantum bus enables all-to-all connectivity within qubit zones, while chiplet-based 3D integration allows processors to scale through modular replication. C12 targets a fully-scaled system within a 17 square meter footprint and sub-watt power consumption per qubit, keeping large-scale quantum systems practical to deploy.

C12 develops its full technology stack in its laboratory in central Paris, including materials, nanofabrication, and system architecture.