Riverlane Raises $75 Million to Meet Surging Global Demand for Quantum Error Correction Technology
Riverlane Raises $75 Million to Meet Surging Global Demand for Quantum Error Correction Technology
IQM, Riverlane, and Zurich Instruments Join Forces to Launch World’s First Quantum Error Correction Platform
IQM, Riverlane, and Zurich Instruments Join Forces to Launch World’s First Quantum Error Correction Platform
Riverlane Strengthens Executive Team With Liz Durst, Former Director of IBM’s Qiskit
Riverlane Strengthens Executive Team With Liz Durst, Former Director of IBM’s Qiskit
Pasqal and Riverlane Join Forces to Achieve Fault-Tolerant Quantum Computing
Pasqal and Riverlane Join Forces to Achieve Fault-Tolerant Quantum Computing
Rigetti and Riverlane Progress Towards Fault Tolerant Quantum Computing With Real-Time and Low Latency Error Correction on Rigetti QPU
Rigetti and Riverlane Progress Towards Fault Tolerant Quantum Computing With Real-Time and Low Latency Error Correction on Rigetti QPU
Riverlane Releases New Report To Accelerate Industry Through the ‘QEC Era’
Riverlane Releases New Report To Accelerate Industry Through the ‘QEC Era’
Riverlane Partners with Atlantic Quantum to Advance Quantum Error Correction on Fluxonium Architecture
Riverlane Partners with Atlantic Quantum to Advance Quantum Error Correction on Fluxonium Architecture
Riverlane and Atlantic Quantum Establish Strategic Partnership
Riverlane and Atlantic Quantum announced a strategic partnership to work together on quantum error correction. The partnership will combine Riverlane's quantum error correction (QEC) stack (‘Deltaflow’) and Atlantic Quantum’s superconducting fluxonium-based qubit architecture to advance useful quantum computing.
QUANTUMWIRE.COM
The UK-Based Quantum Startup Riverlane Unveils Three-Year Roadmap for Quantum Error Correction Stack, Deltaflow
Riverlane released its three-year roadmap for Quantum Error Correction Stack, Deltaflow, yesterday. Based on the success of Deltaflow achieving 1000 reliable QuOps and solving the backlog problem through fast decoding last year, Riverlane has developed this three-year roadmap: 10,000 QuOps and streaming high fidelity memory in 2024; 100,000 QuOps and fast logic operations in 2025; and 100 QuOps with a universal gate set and large-scale logic operations in 2026.